View DS3991ZHB_1997323.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

general description the ds3991 is a controller for cold-cathode fluorescent lamps (ccfls) that are used to backlight liquid-crystal displays (lcds). the ds3991 is available for both push-pull and half-bridge drive topologies. the ds3991 converts a dc voltage (5v to 24v) to the high-voltage (300v rms to 1400v rms ) ac waveform that is required to power the ccfls. the push-pull and half- bridge drive schemes use a minimal number of external components, which reduces component and assembly cost and makes the printed circuit board (pcb) design easy to implement. both drive schemes provide an effi- cient dc to ac conversion and produce near-sinu- soidal waveforms. applications lcd pc monitors lcd tvs features ? ccfl controller for backlighting lcd panels ? minimal external components required ? lamp fault monitoring for lamp-open, lamp- overcurrent, failure-to-strike, and overvoltage conditions ? accurate (?%) on-board oscillator for lamp frequency (40khz to 80khz) ? accurate (?%) on-board oscillator for dpwm burst-dimming frequency (80hz to 300hz) ? device supply undervoltage lockout ? inverter supply undervoltage and overvoltage lockouts ? soft-start on burst-dimming minimizes audible transformer noise ? strike frequency boost ? 100% to < 10% dimming range ? low cost ? single-supply operation range: 4.5v to 5.5v ? temperature range: -40? to +85? ? 16-pin so package (150 mils) ds3991 ________________________________________________________________ maxim integrated products 1 1 2 so top view 3 4 5 6 7 8 14 13 16 15 12 11 10 9 vcc bright pwm_en lcm svmh svml losc posc/pwm vcc slope ovd gb ga vcc vcc gnd ds3991 pin configuration ordering information rev 1; 2/08 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. + denotes a lead-free package. t&r = tape and reel. typical operating circuits appear at end of data sheet. part configuration temp range dimming frequency range (hz) pin-package ds3991z+pp push-pull -40 c to +85 c 80 to 300 16 so (150 mils) ds3991z+t&r/pp push-pull -40 c to +85 c 80 to 300 16 so (150 mils) ds3991z+hb half-bridge -40 c to +85 c 80 to 300 16 so (150 mils) ds3991z+t&r/hb half-bridge -40 c to +85 c 80 to 300 16 so (150 mils) low-cost ccfl controller
ds3991 2 _______________________________________________________________________________________ absolute maximum ratings recommended operating conditions (t a = -40? to +85?.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. voltage range on vcc relative to ground ..........-0.5v to +6.0v voltage range on any lead other than vcc .............................................. -0.5v to (v cc + 0.5v), not to exceed +6.0v operating temperature range ...........................-40 c to +85 c storage temperature range .............................-55 c to +125 c soldering temperature ............................refer to the j-std-020 specification. parameter symbol conditions min typ max units supply voltage v cc (note 1) 4.5 5.5 v input logic 1 v ih 2.2 v cc + 0.3 v input logic 0 v il -0.3 +0.8 v bright, svml, svmh voltage range v ra -0.3 v cc + 0.3 v lcm and ovd voltage range v rc (note 2) -0.3 v cc + 0.3 v gate-driver output charge loading q g 20 nc losc and posc loading c osc 20 pf electrical characteristics (v cc = +4.5v to 5.5v, t a = -40? to +85?.) parameter symbol conditions min typ max units supply current i cc ga, gb loaded with 300pf 5 10 ma low-level output voltage (ga, gb) v ol i ol = 4ma 0.4 v high-level output voltage (ga, gb) v oh i oh = -1ma 2.4 v uvlo threshold: v cc rising v uvlor 4.3 v uvlo threshold: v cc falling v uvlof 3.7 v uvlo hysteresis v uvloh 100 mv svml falling threshold v svmlt 1.94 2.00 2.06 v svmh rising threshold v svmht 1.94 2.00 2.06 v svml and svmh hysteresis v svmh 150 mv lcm and ovd dc bias voltage v dcb 1.35 v lcm and ovd input resistance r dcb 50 k lamp-off threshold v lot (note 3) 1.65 1.75 1.85 v lamp overcurrent threshold v loct (note 3) 3.25 3.35 3.45 v low-cost ccfl controller
ds3991 _______________________________________________________________________________________ 3 note 1: all voltages are referenced to ground unless otherwise noted. currents into the ic are positive; currents out of the ic are negative. note 2: during fault conditions, if ac-coupled, lcm and ovd can go below ground by up to 1v for up to 1s. note 3: threshold voltage includes the dc bias-voltage offset. electrical characteristics (continued) (v cc = +4.5v to 5.5v, t a = -40? to +85?.) parameter symbol conditions min typ max units lamp regulation threshold v lrt (note 3) 2.29 2.35 2.41 v ovd threshold v ovdt (note 3) 2.25 2.35 2.45 v lamp frequency lf osci 40 80 khz lamp frequency tolerance lf tol losc resistor 0.1% over temperature; measured from 0c to +85c -5 +5 % burst-dimming pwm frequency pf osci 80 300 hz burst-dimming pwm frequency tolerance pf tol posc resistor 0.1% over temperature -5 +5 % slope = 0 0 v bright voltage: minimum brightness v bmin slope = 1 3.3 v slope = 0 3.3 v bright voltage: maximum brightness v bmax slope = 1 0 v gate-driver output rise/fall t r /t f c l = 600pf 100 ns typical operating characteristics (v cc = 5.0v, t a = +25?, unless otherwise noted.) active supply current vs. supply voltage ds3991 toc01 supply voltage (v) supply current (ma) 5.3 5.1 4.9 4.7 3.5 4.0 4.5 5.0 5.5 6.0 3.0 4.5 5.5 dpwm = 100% dpwm = 50% dpwm = 10% svm tripped gate q c = 4.5nc f losc = 49.6khz active supply current vs. temperature ds3991 toc02 temperature ( c) supply current (ma) 22.5 4.5 5.0 5.5 6.0 4.0 -40.0 85.0 v cc = 5.5v v cc = 5.0v v cc = 4.5v gate q c = 4.5nc f losc = 49.6khz dpwm = 100% internal frequency change vs. temperature ds3991 toc03 temperature ( c) frequency change (%) 22.5 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 -40.0 85.0 dpwm frequency lamp frequency low-cost ccfl controller
push-pull typical operation at v inv = 12.5v ds3991 toc04 20 s 5.0v 20 s 5.0v ga gb lcm 20 s 2.0v ovd 20 s 2.0v push-pull typical startup with svm ds3991 toc05 50ms 2.0v 50ms 5.0v svm gb lcm 50ms 2.0v ovd 50ms 2.0v push-pull soft-start at v inv = 12.5v ds3991 toc06 0.1ms 5.0v 0.1ms 5.0v ga gb lcm 0.1ms 2.0v ovd 0.1ms 2.0v push-pull lamp strike, expanded view ds3991 toc07 50ms 5.0v 50ms 5.0v ga gb lcm 50ms 2.0v ovd 50ms 2.0v push-pull burst dimming at 133hz, 10% ds3991 toc08 1ms 5.0v 1ms 5.0v ga gb lcm 1ms 2.0v ovd 1ms 2.0v push-pull burst dimming at 133hz, 50% ds3991 toc09 1ms 5.0v 1ms 5.0v ga gb lcm 1ms 2.0v ovd 1ms 2.0v ds3991 4 _______________________________________________________________________________________ typical operating characteristics (continued) (v cc = 5.0v, t a = +25?, multilamp configuration, unless otherwise noted.) low-cost ccfl controller
ds3991 low-cost ccfl controller _______________________________________________________________________________________ 5 half-bridge normal operation, 20 ds3991 toc10 20 s 5.0v 20 s 5.0v ga gb lcm 20 s 2.0v ovd 20 s 2.0v half-bridge soft-start at v inv = 12.5v ds3991 toc11 50 s 5.0v 50 s 5.0v ga gb lcm 50 s 2.0v ovd 50 s 2.0v half-bridge lamp strike, expanded view ds3991 toc12 0.5ms 5.0v 0.5ms 5.0v ga gb lcm 0.5ms 2.0v ovd 0.5ms 2.0v half-bridge burst dimming at 166hz, 10% ds3991 toc13 1ms 5.0v 1ms 5.0v ga gb lcm 1ms 2.0v ovd 1ms 2.0v half-bridge burst dimming at 166hz, 50% ds3991 toc14 1ms 5.0v 1ms 5.0v ga gb lcm 1ms 2.0v ovd 1ms 2.0v typical operating characteristics (continued) (v cc = 5.0v, t a = +25?, single-lamp configuration, unless otherwise noted.)
ds3991 low-cost ccfl controller 6 _______________________________________________________________________________________ pin description pin name i/o function 1 slope i bright slope select. this digital input determines the slope of the bright input when an analog dc voltage is used to control lamp brightness (pwm_en = 0). slope = 0: positive slope (0v = minimum brightness, 3.3v = 100% brightness) slope = 1: negative slope (0v = 100% brightness, 3.3v = minimum brightness) 2, 3, 4 vcc connect to voltage supply. these pins should be connected to the voltage supply pin, vcc. 5 losc o lamp oscillator resistor adjust. a resistor (r losc ) to ground on this pin sets the frequency of the lamp oscillator (f losc ). (r losc x f losc = 4.0e9). 6 posc/ pwm o/i burst-dimming pwm oscillator resistor adjust/pwm digital input. if pwm_en = 0, a resistor (r posc ) to ground on this pin sets the frequency (f posc ) of the burst-dimming pwm oscillator (r posc x f posc = 4.0e6). if pwm_en =1, a digital 80hz to 300hz pwm signal at this input controls the lamp brightness. 7 bright i lamp-brightness control. if pwm_en = 0, a 0v to 3.3v analog dc voltage at this input controls the brightness of the lamp. 8 pwm_en i pwm lamp-brightness control enable. this digital input determines whether the bright or posc/pwm input is used to control lamp brightness. pwm_en = 0 = pwm disabled (analog dc voltage applied at the bright input) pwm_en = 1 = pwm enabled (digital pwm signal applied at the posc/pwm input) 9 ga o mosfet gate drive a. drives a logic-level power mosfet. 10 gb o mosfet gate drive b. drives a logic-level power mosfet. 11 lcm i lamp current monitor input. lamp current is monitored by a resistor placed in series with the low-voltage side of the lamp. 12 ovd i overvoltage detection input. lamp voltage is monitored by a capacitor divider placed on the high-voltage side of the lamp. 13 gnd signal ground 14 vcc voltage supply, 4.5v to 5.5v 15 svmh i supply voltage monitor high. the dc inverter-supply voltage is monitored by an external resistor divider. the resistor-divider should be set such that it provides 2v at this pin for the maximum allowable range of the dc inverter supply. pulling this input above 2v turns the lamps off and resets the controller. connect to gnd if not used. 16 svml i supply voltage monitor low. the dc inverter-supply voltage is monitored by an external resistor divider. the resistor-divider should be set such that it provides 2v at this pin for the minimum allowable range of the dc inverter supply. pulling this input below 2v turns the lamps off and resets the controller. connect to vcc if not used.
ds3991 low-cost ccfl controller _______________________________________________________________________________________ 7 main system block diagram ga gb ovd overvoltage detection lcm lamp current monitor 80hz to 300hz external resistor lamp frequency set vcc (4.5v to 5.5v) gnd ccfl controller (see the ccfl channel block diagram ) external resistor burst-dimming frequency set analog lamp brightness control (pwm_en = 0) pwm lamp brightness control (pwm_en = 1) svml supply voltage monitor low channel fault channel enable mosfet gate drivers losc pwm_en bright slope posc dpwm signal 2.0v 40khz to 80khz oscillator ( 5%) 80hz to 300hz oscillator ( 5%) positive or negative slope select ramp generator fault handling system enable/ por mux svmh supply voltage monitor high 2.0v vref uvlo ds3991
ds3991 low-cost ccfl controller 8 _______________________________________________________________________________________ ccfl channel block diagram gate drivers ga gb digital ccfl controller channel fault lamp frequency (40khz to 80khz) burst-dimming pwm signal channel enable mosfet gate drivers lcm lamp current monitor 400mv 2.0v lamp overcurrent lamp strike and regulation lamp out 1.0v 1.0v ovd overvoltage detector lamp maximum voltage regulation 64 lamp cycle integrator overvoltage ds3991 detailed description the ds3991 is available for both push-pull and half- bridge drive topologies. in both drive topologies, the ds3991 drives two logic-level mosfets. the ds3991 alternately turns on the two mosfets to create the high- voltage ac waveform on the secondary. by varying the duration of the mosfet turn-on times, the controller is able to accurately control the amount of current flowing through the ccfl lamp. see the typical push-pull application and typical half-bridge application figures. the ds3991 can also drive more than one ccfl lamp per channel. the typical push-pull application, multiple lamps per channel and typical half-bridge application, multiple lamps per channel figures show an application driving three lamps. a series resistor on the low-voltage side of the ccfl lamp enables current monitoring. the voltage developed across this resistor is fed to the lamp current monitor (lcm) input on the ds3991. the ds3991 compares the resistor voltage against an internal reference voltage to determine the duty cycle for the mosfet gates. see the main system block diagram and the ccfl channel block diagram for more information. dimming control the ds3991 uses burst dimming to control the lamp brightness. during the high period of the dpwm cycle, the lamp is driven at the selected lamp frequency (40khz to 80khz) as shown in figure 1. this part of the cycle is also called the burst period because of the lamp-frequency burst that occurs during this time. during the low period of the dpwm cycle, the controller disables the mosfet gate drivers so the lamp is not driven. this causes the current to stop flowing in the lamp, but the time is short enough to keep the lamp from de-ionizing. dimming is increased/decreased by adjusting (i.e., modulating) the burst-period duty cycle. at the beginning of each burst-dimming cycle, soft-start slowly ramps the lamp current to reduce the potential to create audible transformer noise. there are two methods to control the duty cycle and frequency of the burst-dimming dpwm. if the pwm_en pin is tied low, then the analog-control method is enabled; a 0v to 3.3v analog voltage at the bright input pin determines the duty cycle of a digital pulse- width modulated (dpwm) signal. the frequency of the dpwm signal is determined by the value of the resistor tied from the posc pin to ground. the slope of the bright dimming input is either positive or negative based on whether the slope pin is tied low or high, respectively.
ds3991 low-cost ccfl controller _______________________________________________________________________________________ 9 if the pwm_en pin is tied high, the digital control method is enabled and an external pwm signal between 80hz and 300hz is applied at the posc/pwm pin to set the brightness of the lamp. in the digital con- trol method, the slope and bright pins are not used. lamp strike on lamp strike, the ds3991 boosts the normal operating lamp frequency by 33%. this is done to increase the voltage created and help ensure that the lamp strikes. once the controller detects that the lamp has struck, the frequency is returned to the normal lamp frequency. setting the lamp and dpwm frequencies using external resistors both the lamp and dpwm frequencies are set using external resistors. the resistance required for either fre- quency can be determined using the following formula: where k = 4000k x khz for lamp frequency calcula- tions, k = 4k x khz for dpwm frequency calculations. example: select the resistor values to configure the ds3991 to have a 50khz lamp frequency and a 160hz dpwm frequency. for the dpwm resistor calculation, k = 4k x khz. for the lamp frequency resistor (r losc ) calculation, k = 4000k x khz. the formula above can now be used to calculate the resistor values for r losc and r posc as follows: supply monitoring the ds3991 has supply-voltage monitors (svml and svmh) for the inverter? dc supply (v inv ) and an undervoltage lockout for the v cc supply to ensure that voltage levels are adequate for proper operation. the inverter supply is monitored for overvoltage conditions at the svmh pin and undervoltage conditions at the svml pin. external resistor-dividers at each svm input feed into two comparators, both having 2v thresholds (see figure 2). using the equation below to determine the resistor values, the svmh and svml trip points (v trip ) can be customized to shut off the inverter when the inverter supply voltage rises above or drops below specified values. operating with the inverter supply at too low of a level can prevent the transformer from reaching the strike voltage and could potentially cause numerous other problems. operating with the inverter voltage at too high of a level can be damaging to the inverter components. proper use of the svms can prevent these problems. if desired, the high and/or low svms can be disabled by connecting the svmh pin to gnd and the svml pin to vcc. the svmh and svml are high-impedance inputs and noise on the inverter supply can cause the monitors to inadvertently trigger even though the inputs contain hys- teresis. the user may wish to add a lowpass filter to reduce the noise present at the svmh and svml inputs. the v cc monitor is a 5v supply undervoltage lockout (uvlo) that prevents operation when the ds3991 does not have adequate voltage for its analog circuitry to operate or to drive the external mosfets. the v cc monitor features hysteresis to prevent v cc noise from v trip = 2.0 r 1 + r 2 r 1 r posc = 4k khz 0.160khz = 25k r losc = 4000k khz 50khz = 80k r osc = k f osc 80hz to 300hz lamp current soft-start burst-dimming pwm signal (either created inside the ds3991 or sourced at the posc/pwm pin) figure 1. digital pwm dimming and soft-start
ds3991 low-cost ccfl controller 10 ______________________________________________________________________________________ ds3991 r 2 r 1 v trip v inv svml 2.0v 2.0v svmh r 2 r 1 v trip v inv figure 2. setting the svml and svmh threshold voltages yes mosfet gate drivers enabled device and inverter supplies at proper levels? fault state (must power cycle the ds3991 or take svml below 2v or svmh above 2v to reset the ccfl controller) lamp overcurrent (instantaneous) strike lamp (ramp and regulate to ovd threshold) lamp strike timeout (65,536 lamp cycles) run lamp (regulate lamp current bounded by lamp voltage) lamp-out timeout (65,536 lamp cycles) overvoltage (64 lamp cycles) if lamp regulation threshold is met figure 3. fault-handling flowchart causing spurious operation when v cc is near the trip point. this monitor cannot be disabled by any means. fault monitoring the ds3991 provides extensive fault monitoring. it can detect open-lamp, lamp overcurrent, failure to strike, and overvoltage conditions. figure 3 shows a flowchart of how the ds3991 controls and monitors each lamp. the steps are as follows: the lamps do not turn on unless the ds3991 supply voltage is > 4.5v and the voltage at the supply-voltage monitor low (svml) input is > 2v and the supply-volt- age monitor high (svmh) input is < 2v. when both the ds3991 and the dc inverter supplies are at acceptable levels, the ds3991 attempts to strike the lamps. the ds3991 slowly ramps up the mosfet gate duty cycle until the lamp strikes. the controller detects
ds3991 low-cost ccfl controller ______________________________________________________________________________________ 11 that the lamp has struck by detecting current flow in the lamp. if during the strike ramp, the maximum allowable voltage is reached, the controller stops increasing the mosfet gate duty cycle to keep from overstressing the system. the ds3991 goes into a fault-handling state if the lamp has not struck after 65,536 lamp cycles. if an overvoltage event is detected during the strike attempt, the ds3991 disables the mosfet gate drivers and goes into the fault handling state. once the lamp is struck, the ds3991 moves to the run- lamp stage. in the run-lamp stage, the ds3991 adjusts the mosfet gate duty cycle to optimize the lamp cur- rent. the gate duty cycle is always constrained to keep the system from exceeding the maximum allowable lamp voltage. if lamp current ever drops below the lamp-out reference point for 65,536 lamp cycles, the lamp is considered extinguished. in this case the mos- fet gate drivers are disabled and the device moves to the fault-handling stage. in the case of a lamp overcurrent, the ds3991 instanta- neously declares the controller to be in a fault state. if the ds3991 goes into the fault state, the ds3991 shuts down. once a fault state is entered, the controller remains in that state until one of the following occurs: v cc drops below the uvlo threshold svml input drops below 2.0v svmh input goes above 2.0v applications information component selection external component selection has a large impact on the overall system performance and cost. the two most important external components are the transformers and mosfets. the transformer should be able to operate in the 40khz to 80khz frequency range of the ds3991, and the turns ratio should be selected so the mosfet drivers run at 28% to 35% duty cycle during steady-state operation. the transformer must be able to withstand the high open-circuit voltage that is used to strike the lamp. additionally, its primary/secondary resistance and inductance characteristics must be considered because they contribute significantly to determining the efficiency and transient response of the system. table 1 shows a transformer specification that has been utilized for a 12v inverter supply, 438mm x 2.2mm lamp design. the mosfets must have a threshold voltage that is low enough to work with logic-level signals, a low on-resis- tance to maximize efficiency and limit the mosfet? power dissipation, and a breakdown voltage high enough to handle the transient. for push-pull topolo- gies, the breakdown voltage of the mosfets should be a minimum of 3x the inverter voltage supply. additionally, the total gate charge must be less than q g , which is specified in the recommended operating conditions table. table 1. transformer specifications (as used in the typical operating circuits ) parameter conditions min typ max units turns ratio (secondary/primary) push-pull type (notes 1, 2, 3) 40 turns ratio (secondary/primary) half-bridge type (note 3) 80 frequency 40 80 khz output power 6 w output current 5 8 ma primary dcr center tap to one end 200 m secondary dcr 500 primary leakage 12 h secondary leakage 185 mh primary inductance 70 h secondary inductance 500 mh 1000ms (min) 2000 secondary output voltage continuous 1000 v rms note 1: primary should be bifilar wound with center-tap connection. note 2: turns ratio is defined as secondary winding divided by the sum of both primary windings. note 3: this is the nominal turns ratio for driving a 438mm x 2.2mm lamp with a 12v supply. refer to application note 3375 for more information on push-pull type applications.
ds3991 low-cost ccfl controller 12 ______________________________________________________________________________________ inverter supply voltage (5v 10% to 24v 10%) svml svmh vcc device supply voltage (5v 10%) vcc vcc bright analog lamp brightness control losc posc/pwm resistor set lamp frequency pwm lamp brightness control (optional) resistor set burst-dimming frequency pwm_en slope vcc gb ovd lcm gnd ga ccfl lamp dual power mosfet transformer overvoltage detection lamp current monitor ds3991 on = open off/reset = closed typical operating circuits typical push-pull application
ds3991 low-cost ccfl controller ______________________________________________________________________________________ 13 inverter supply voltage (5v 10% to 24v 10%) svml svmh vcc device supply voltage (5v 10%) vcc vcc bright analog lamp brightness control losc posc/pwm resistor set lamp frequency pwm lamp brightness control (optional) resistor set burst-dimming frequency pwm_en slope vcc gb ovd lcm gnd ga ccfl lamp dual power mosfet transformer overvoltage detection lamp current monitor ds3991 on = open off/reset = closed typical operating circuits (continued) typical half-bridge application
ds3991 low-cost ccfl controller 14 ______________________________________________________________________________________ inverter supply voltage (5v 10% to 24v 10%) on = open off/reset = closed gb ovd lcm svml ga ccfl lamp a ccfl lamp b ccfl lamp c dual power mosfet 2n3904 +5v vcc device supply voltage (5v 10%) vcc vcc bright analog lamp brightness control losc posc/pwm resistor set lamp frequency resistor set burst-dimming frequency gnd svmh vcc 2n3904 +5v 2n3904 +5v pwm_en slope ds3991 typical operating circuits (continued) typical push-pull application, multiple lamps per channel
ds3991 low-cost ccfl controller ______________________________________________________________________________________ 15 inverter supply voltage (5v 10% to 24v 10%) on = open off/reset = closed gb ovd lcm svml ga ccfl lamp a ccfl lamp b ccfl lamp c dual power mosfet 2n3904 +5v vcc device supply voltage (5v 10%) vcc vcc bright analog lamp brightness control losc posc/pwm resistor set lamp frequency resistor set burst-dimming frequency gnd svmh vcc 2n3904 +5v 2n3904 +5v pwm_en slope ds3991 typical operating circuits (continued) typical half-bridge application, multiple lamps per channel
ds3991 low-cost ccfl controller maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 16 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2008 maxim integrated products is a registered trademark of maxim integrated products, inc. power-supply decoupling to achieve best results, it is highly recommended that a decoupling capacitor be used on pin 14, the ic power-supply pin. typical values of decoupling capaci- tors are 0.01? or 0.1?. use a high-quality, ceramic, surface-mount capacitor, and mount it as close as pos- sible to the vcc and gnd pins of the ic to minimize lead inductance. pins 2, 3, and 4 require connection to supply voltage (vcc) but do not require any additional decoupling. package information for the latest package outline information, go to www.maxim-ic.com/dallaspackinfo . package type document no. 16 so (150 mils) 56-g2008-001 revision history revision number revision date description pages changed 0 1/08 initial release. 1 2/08 updated ordering information. 1

▲Up To Search▲

Price & Availability of DS3991ZHB

	To Download DS3991ZHB Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .